Recent MacBook Pro and some other models that have mute boots neither emit sounds nor flash their displays if they encounter problems during their POST.
#GOODWAY RAM 4 UPDATE#
#GOODWAY RAM 4 CODE#
Until then, all code has been run on a single core too, and the other cores aren’t run up until after the kernel is busy initialising the Mac. Most of the plethora of devices within the SoC don’t load their firmware and start running until after the kernel has started loading. At that stage, the alternative would be to try to start up in Recovery mode, possibly flashing the power light provided on some models. In the event of early boot failure, the only recourse seems to be to abandon the process, and leave the Mac in DFU mode. Prior to that are ‘breadcrumbs’ that are only intelligible to Apple’s engineers. If that isn’t possible, then the fallback is to go into DFU mode and await a connection over USB.Īs with Intel Macs, there’s no accessible record in the log of what has happened during the initial phase of the boot process, as log records only begin with the kernel. Booting an M-series Mac thus starts with the immutable Boot ROM in the hardware, whose most important task is to verify the executable for the next stage, then load and run it. In contrast, boot security in Apple silicon Macs aims to provide a verified chain of trust through each step in the boot process to the loading of macOS, that can’t be exploited by malicious components.
#GOODWAY RAM 4 FULL#
Once a T2 Mac has performed its POST and initialised the SMC, the T2 sub-system establishes the level of Secure Boot in force, and, if that’s Full or Medium Security, boot.efi is checked before being loaded, and that leads through to the rest of the boot process.
With two separate processors in each T2 Mac, there are two separate sets of firmware, one EFI and the other known as iBridge or BridgeOS. Maybe Apple silicon Macs do still run POST, but haven’t yet found a good way to report it? To discover whether that’s feasible, you need to compare what happens in their boot sequences. Those are normally retrieved from NVRAM, but as far as I can see, Apple silicon Macs don’t have anywhere in their NVRAM where they might store the result of a POST. While that does report the results of the last Diagnostics test run (if any), for Apple silicon Macs there’s no mention of any POST, as there is on Intel Macs, even those with a T2 chip.
The first place to look is where Macs normally report the results of their last POST, in the Diagnostics item of System Information. One catch here is recalling that POST routines may not be run for a restart, as they normally need a ‘cold’ start from the Mac being shut down. So what happens when an Apple silicon Mac fails its POST? Does it even run them? Every model of Mac in the past has had its own POST routines, some that have become famous because of the sounds that result, or what’s displayed, from the sight of a Sad Mac to the sound of a car crash. Power-on self-tests (POST) are widely used in electronics, and one of the oldest features of personal computers.
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